NL-Sim is the efficient tool for design, simulation and characterization of CMOS standard cell libraries and complex functional blocks (IP blocks) of very large integrated circuits (VLSI) which are designed basing on deep-submicron and nanometer CMOS processes. The tool contains characterization features for standard cells, IP blocks and macro blocks of VLSI; embedded circuit simulation features; features for automatic synthesis of the logic-timing models of library cells and IP blocks.
Characterization meant multiple circuit simulations for different values of the input parameters with the generation of macromodels for automatic synthesis and logic-timing simulation of IP blocks and SoCs. The main objectives of the characterization are both calculation of timing and power parameters required for the automated IP blocks and SoCs design and the generation of macromodels in the "Liberty" format.
The main problem of such process is the significant amount of CPU time. The advantage of NL-Sim is a significant reduction of time (from several months to 2-3 days) due to the close integration of characterization feature with built-in fast circuit simulator.
The characterization results are verified using ‘LibraryCompiler’ (Synopsys).
The customer provide:
Equipment - multi-core Linux blade server.
Integration of characterization feature with built-in fast circuit simulator; embedded features for the cyclic calculation of standard cell and IP block parameters that provides rapid characterization of libraries taking into account process parameter variations and nanometer VLSI operating modes.
The service price is negotiable (From 0.5 million rubles to 5 million rubles depending on the size and complexity of the library).